Develop DDR PHY/DRAM initialization drivers and conduct testing
Develop firmware for memory tuning and optimization routines
Participate in pre/post-silicon bring-up(power-on) of memory subsystems
Develop software routines for DDR PHY/DRAM initialization, training, equalization, IO tuning, SI/PI optimization, etc.
Validate and characterize the silicon features for DDR/GDDR/HBM
Contribute to writing test conditions, executing test plans in pre/post-silicon environments, perform failure analysis to identify root causes, and develop innovative solutions
Key Qualifications
Minimum of 3 years of experience with firmware in a post-silicon validation environment
Working experience with DDR4/5 controller and PHY, JEDEC and DFI specifications
Expertise in DDR initialization firmware, controller features, equalization features validation, and related tuning
Deep understanding of server boot-up flow, specifically DDR initialization process
Strong debugging skills at both SoC and system levels, including DDR protocol-level and signal integrity-level issues
Experience in DDR RAS, Performance, Power features, and related firmware routines for tuning/optimization
Experience in microcontroller and embedded systems programming using C/C++
Proficiency in script languages such as Perl or Python, Linux shell script
Must be a self-starting team player who can work with minimal guidance